1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device.
2. Description of Background Art
In a structure where surfaces of adjacent Cu wiring lines and the surface of an interlayer insulating layer positioned between them are on substantially the same plane, a leak current flows on the interface between adjacent insulators, causing electromigration of copper atoms that accompanies such a leak current. Subsequently, short-circuiting occurs between wiring lines.
As a technique for preventing short-circuiting among copper wiring lines, there is a Cu recessing process in which Cu wiring lines are etched so that their surfaces are recessed from the surface of the interlayer insulating layer. Such Cu recessing processes includes a wet-etching method and a dry-etching method such as plasma etching using a CF-based gas. However, dry etching is not practical because it involves complex steps that include wet etching to remove by-products deposited after the dry etching. Thus, more attention has been placed on wet etching (see JP 2001-210630 A). The entire contents of this publication are incorporated herein by reference.